The integrated circuitry (IC) industry uses dielectric materials having a low dielectric constant (low-k materials) including nanoglass and xerogel materials. While these materials have excellent dielectric properties, such materials also tend to have high porosity. This can cause problems at the metallic interface as layers of metal or metal alloys contact dielectric surfaces. Windows or vias are etched or otherwise fashioned into the dielectric to form interconnects between various dielectric layers. Such vias contain various metals such as copper, tungsten, aluminum, or alloys thereof.
However, such metal layers often have migration problems whereby the various metallic elements leach into, or migrate, into the pores of the dielectric. Such migration can lead to a lack of uniformity in the overall properties of the semiconductor wafer produced. Further, the porous dielectric may allow moisture to creep into the pores. This can cause "outgassing" as current is run through the wafer, thus causing a potential circuit failure.
To solve this problem, various barrier layers have been tried which are inserted into the dielectric and positioned between the dielectric and the eventual metal plug. For example, such barrier layers comprise tantalum nitride, titanium nitride, or combinations thereof. Nevertheless, the problems of adhesion and moisture blocking have not been completely solved by the known barriers currently in use.